Staff Design Enablement Engineer (STA)
About This Gig
Headquarters: Ho Chi Minh, Vietnam Job Description'- Static timing analysis and timing closure (TOP and block).- Propose technical solution to enhance the design from RTL to GDS to achieve timing closure.- Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications- From 2 years of work experience in the related field. - Bachelor or Master Degree in Information Technology/Computer- Engineering/Computer Science/Telecoms/Electronics or similar.- Experienced in Timing closure & tape out projects.- Understanding of PnR design, CTS design & Sign-off.- Have knowledge in logic related design activitíe (clock design, system control design, synthesis, RTL design, DFT design,...) is a plus point.- Solid knowledge in using EDA tool (Synopsys, Cadence,...)- Good written and oral communication (in English) & interpersonal skills- Strong team-oriented working and good relationship-build
About the Seller
Renesas Electronics
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